Event Abstract

Three-dimensional, tapered nanoelectrodes on CMOS electronics for an intracellular contact

  • 1 Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS, Germany
  • 2 Universität Heidelberg, Germany

Motivation The combination of MEAs with a CMOS integrated circuit leads to a much better resolution in electrical signals due to the data processing in direct proximity to the electrodes [1]. Additionally a high integration density leads to massive parallel recording on a small chip (see e.g. [2, 3]). Most of the MEAs that were placed on a CMOS chip by now consist of planar electrodes and thereby measure electrical signals capacitively through the cell’s membrane [1-4]. To reduce the signal-to noise ratio and to thereby achieve a better resolution, one may use three-dimensional intracellular electrodes [4, 5]. Here we present an approach for CMOS compatible production of an intracellular Nanoelectrode-Array on top of planar base electrodes via the use of standard microsystem technology’s methods. The array consists of free-standing nanostructures with a diameter of about 200 nm and a tapered top, which can be placed on a CMOS integrated circuit for stimulating and recording cells electrically. Material and Methods Planar MEAs on Silicon wafers, optionally on CMOS integrated circuits, are used and processed via standard CMOS-compatible techniques, namely chemical vapor deposition (CVD), atomic layer deposition (ALD), i-line optical lithography, isotropic etching and deep reactive ion etching (DRIE). Especially the skillful combination of DRIE and ALD in a sacrificial layer technique, developed by Fraunhofer IMS [6], results in three-dimensional nanoelectrodes which height can be tuned in the range of a few micrometers. By an additional spacer method, their width is adjustable down to values smaller than 200 nm. To optimize the electrodes for an intracellular contact, a further technique for producing tapered nanoelectrodes’ tips is presented. Results and Discussion In order to achieve a highly conform layer for protecting the underlying electronics, Ta2O5 is placed on top of the planar electrodes as a biocompatible, high-k material. An amorphous Silicon sacrificial layer is placed on top. For achieving a tunable diameter in the range of about 200 nm with standard i-line lithography, a spacer technique is used. A second hard mask, e.g. TEOS oxide, is placed on top of the structured first hard mask which consists of undoped silicon glass (USG). After physical etching of the hard masks double structure and ensuing DRIE down to the base electrodes, a nano-template is generated. ALD-filling with Ruthenium results in an electrical contact to the base electrode. The Ruthenium surface can then be structured by inductively coupled plasma etching (ICP). After removal of the sacrificial layer per isotropic vapor etching, freestanding nanoelectrodes remain. In order to taper the nanoelectrodes’ tips, an additional step is induced before Ruthenium deposition. The inhomogeneous deposition of an additional sacrificial layer shapes the template’s tips like shown in Fig. 1. To validate that the resulting, tapered electrodes can be taken up by living cells, rat embryonic fibroblasts (REF-cells) were positioned on top of the array. The electrodes’ pattern is reflected in the DAPI stained cells’ nuclei (see Fig. 2). Conclusion and Outlook The developed technique provides three dimensional nanoelectrodes, which can be placed on top of a CMOS substrate for an intracellular, electrical contact. Therefore they can be used to divert and directly process intracellular signals resistively. The techniques developed by Fraunhofer IMS enable the tapering of the structures as a whole and of the electrodes’ tips only. A first study shows that a penetration of the so produced nanoelectrodes through the cell’s membrane is likely. Henceforth, the nanoelectrodes will be used as an electrical interface between CMOS integrated circuits and cells’ interior. They will be placed as a 16 x 16 MEA positioned directly on CMOS electronics. The extensive functions of the CMOS integrated circuit include electrical stimulation via current or voltage injection, read-out-electronics for processing small electrical signals, digital converter and a SRAM memory. The so produced tool may prospectively lead to an increased understanding of biological tissue regarding the intercellular communication and to manifold applications in medical implants and sensors.

Figure 1
Figure 2

Acknowledgements

This work was supported by the Fraunhofer and Max-Planck cooperation program.

References

[1] A. Hierleman et al., Proceedings of the IEEE, Vol. 99, No. 2, February 2011
[2] M. Ballini et al., IEEE Journal of Solid-State Circuits, Vol. 49, No. 11, November 2014
[3] J. Dragas et al., IEEE Journal of Solid-State Circuits, Vol. 52, No. 6, June 2017
[4] M.E. Spira and A. Hai, Nature Nanotechnology, Vol. 8, February 2013
[5] J. Abbott et al., Nature Nanotechnology, Vol. 12, February 2017
[6] A. Goehlich, A. Jupe and H. Vogt, Patentanmeldung Nr. DE102014213390 A1, US20170113928, WO2016005464A, 2014

Keywords: intracellular contact, Nano-Electrode-Array, CMOS electronics, Tapering techniques, ALD

Conference: MEA Meeting 2018 | 11th International Meeting on Substrate Integrated Microelectrode Arrays, Reutlingen, Germany, 4 Jul - 6 Jul, 2018.

Presentation Type: Oral Presentation

Topic: Microelectrode Array Technology

Citation: Allani S, Jupe A, Rustom A, Kappert H and Vogt H (2019). Three-dimensional, tapered nanoelectrodes on CMOS electronics for an intracellular contact. Conference Abstract: MEA Meeting 2018 | 11th International Meeting on Substrate Integrated Microelectrode Arrays. doi: 10.3389/conf.fncel.2018.38.00108

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Received: 16 Mar 2018; Published Online: 17 Jan 2019.

* Correspondence: Mrs. Sonja Allani, Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS, Duisburg, 47057, Germany, sonja.allani@ims.fraunhofer.de